PIC18F4610T-I/ML【PDF 234/234 页】IC MCU FLASH 32KX16 44QFN

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Sheet目录3878

230页 231页 232页 233页 [234页]

2009 Microchip Technology Inc.

DS39636D-page 101

PIC18F2X1X/4X1X

TABLE 9-3:

PORTB I/O SUMMARY

Pin

Function

TRIS

Setting

I/O

Type

Description

RB0/INT0/FLT0/

AN12

RB0

DIG

LATB<0> data output; not affected by analog input.

TTL

PORTB<0> data input; weak pull-up when RBPU bit is cleared.

Disabled when analog input enabled.(1)

INT0

External interrupt 0 input.

FLT0

Enhanced PWM Fault input (ECCP1 module); enabled in software.

AN12

ANA

A/D input channel 12.(1)

RB1/INT1/AN10

RB1

DIG

LATB<1> data output; not affected by analog input.

TTL

PORTB<1> data input; weak pull-up when RBPU bit is cleared.

Disabled when analog input enabled.(1)

INT1

External interrupt 1 input.

AN10

ANA

A/D input channel 10.(1)

RB2/INT2/AN8

RB2

DIG

LATB<2> data output; not affected by analog input.

TTL

PORTB<2> data input; weak pull-up when RBPU bit is cleared.

Disabled when analog input enabled.(1)

INT2

External interrupt 2 input.

AN8

ANA

A/D input channel 8.(1)

RB3/AN9/CCP2

RB3

DIG

LATB<3> data output; not affected by analog input.

TTL

PORTB<3> data input; weak pull-up when RBPU bit is cleared.

Disabled when analog input enabled.(1)

AN9

ANA

A/D input channel 9.(1)

CCP2(2)

DIG

CCP2 compare and PWM output.

CCP2 capture input

RB4/KBI0/AN11

RB4

DIG

LATB<4> data output; not affected by analog input.

TTL

PORTB<4> data input; weak pull-up when RBPU bit is cleared.

Disabled when analog input enabled.(1)

KBI0

TTL

Interrupt on pin change.

AN11

ANA

A/D input channel 11.(1)

RB5/KBI1/PGM

RB5

DIG

LATB<5> data output.

TTL

PORTB<5> data input; weak pull-up when RBPU bit is cleared.

KBI1

TTL

Interrupt on pin change.

PGM

Single-Supply Programming mode entry (ICSP). Enabled by LVP

Configuration bit; all other pin functions disabled.

RB6/KBI2/PGC

RB6

DIG

LATB<6> data output.

TTL

PORTB<6> data input; weak pull-up when RBPU bit is cleared.

KBI2

TTL

Interrupt on pin change.

PGC

Serial execution (ICSP) clock input for ICSP and ICD operation.(3)

RB7/KBI3/PGD

RB7

DIG

LATB<7> data output.

TTL

PORTB<7> data input; weak pull-up when RBPU bit is cleared.

KBI3

TTL

Interrupt on pin change.

PGD

DIG

Serial execution data output for ICSP and ICD operation.(3)

Serial execution data input for ICSP and ICD operation.(3)

Legend:

DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level input/output;

x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).

Note 1:

Configuration on POR is determined by the PBADEN Configuration bit. Pins are configured as analog inputs by default

when PBADEN is set and digital inputs when PBADEN is cleared.

Alternate assignment for CCP2 when the CCP2MX Configuration bit is ‘0’. Default assignment is RC1.

All other pin functions are disabled when ICSP or ICD are enabled.

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